In a Large Scale Integration (LSI), such as a Central Processing Unit (CPU), electric power is regularly consumed due to leakage current also in a state where the LSI is not operating. It is remarkable in particular in a microfabrication process in recent years, and 30 percent of total power consumption is occupied in a 90-nm process.
A method of cutting off a power supply in a state (standby state) where the LSI does not perform the calculation processing is effective for reduction of leakage current. However, since the processed data stored in a storage gate will erase if the power is turned OFF, data is held also after power supply cutoff by the method of applying only a storage gate into alternative power supply, or the method of restoring all the data storaged in the storage gate to external before the power supply cutoff (for example, refer to Patent Literature 1).
Since it is necessary to wire a storage gate's proprietary power supply line in a circuit when applying only a storage gate into alternative power supply, complication of a power supply line is caused. Also, since a part to which the power supply is supplied and a part to which the power supply is cut off are existed, the measure of separating a signal line between a logic calculation unit and a storage gate is needed at the time of power supply cutoff.
Moreover, when turning ON a logic calculation unit, the power supply of a storage gate becomes unstable easily, and the measure to data corruption is also needed. Since the power supply of a memory element is turned OFF when restoring all the data storaged in a storage gate before power supply cutoff, the above-mentioned measure becomes unnecessary. However, there are problems, like a data restoring process requires a time period as restoration data amount increases.
On the other hand, it is already disclosed about a data holding apparatus using a nonvolatile storage element and a data holding method (for example, refer to Patent Literature 2).
The problem regarding the holding data at the time of power supply cutoff causes in the data storaged in a storage gate erasing, if the power supply of a logic calculation circuit is cut off.
On the other hand, since it is necessary to wire a storage gate's proprietary power supply line in a circuit when applying only a storage gate into alternative power supply, complication of a power supply line is caused. Also, since a part to which the power supply is supplied and a part to which the power supply is cut off are existed, the measure of separating a signal line between a logic calculation unit and a storage gate is needed at the time of power supply cutoff. Moreover, when turning ON a logic calculation unit, the power supply of a storage gate becomes unstable easily, and the measure to data corruption is also needed.
Since the power supply of a memory element is turned OFF when restoring all the data storaged in a storage gate before power supply cutoff, the above-mentioned measure becomes unnecessary. However, there are problems, like a data restoring process requires a time period as restoration data amount increases.
Patent Literature 1: Japanese Patent No. 3910902
Patent Literature 2: Japanese Patent No. 3737472